In many applications such as matrix converters and direct current (DC) breakers, bidirectional power device functionality is required to block voltage and to conduct current in both directions. Power semiconductor devices such as the triac known from JP 57-049269 A or the bidirectionally controlled thyristor (BCT) known from EP 0 880 182 B1 offer such functionality but full switching control is limited to turn-on only. Moreover, in these power devices only half of the wafer area is used for each current direction or polarity.
To achieve full turn-off control, an insulated gate bipolar transistor (IGBT) has been reported with the emitter MOS structure employed on both sides while using the metal-oxide-semiconductor (MOS) cell p-well as an anode for the opposite emitter. However, it is difficult to implement such structure on both sides of an IGBT chip since the planar termination is constrained by the subsequent die attach for packaging and the gate access also adds further complexity. This problem is especially prominent in higher voltage devices with a rated voltage above 1200 V. Hence, it is traditionally much easier to implement reverse blocking (RB) or bidirectional devices in thyristor or gate commutated thyristor (GCT) wafers with bevel termination packaged in standard press packs.
For bidirectional power semiconductor device functionality, nowadays usually two reverse blocking (RB) power semiconductor devices are used in antiparallel configuration or two reverse-conducting (RC) power semiconductor devices are used in back-to-back configuration.
When two RB power semiconductor devices are connected in antiparallel configuration this has the disadvantage that only the device area of one of these two RB power semiconductor devices is used for each current direction. Accordingly, this configuration results in a large device and thermal management becomes difficult as heat generation is not homogeneously distributed over the whole device area. The latter can easily result in overheating problems. On the other side a configuration with two RC power semiconductor devices in back-to-back configuration has the disadvantage of high losses as the losses of the two devices add up in the serial connection.
A known reverse-conducting power semiconductor device is the reverse-conducting gate commutated thyristor (RC-GCT) which combines one or more gate commutated thyristors (GCTs) and one or more diodes within a single power semiconductor device. The bi-mode gate commutated thyristor (BGCT) disclosed in WO 2012/041958 A2 is a RC-GCT, which comprises in a single semiconductor wafer a plurality of gate commutated thyristor (GCT) cells electrically connected in parallel to one another, and a plurality of diode cells distributed between the GCT cells. The diode cells are also electrically connected in parallel to one another and to the GCT cells, albeit with opposing forward direction. A known reverse-blocking power semiconductor device is the reverse blocking gate commutated thyristor (RB-GCT) which differs from the RC-GCT in that it has no diode cells connected in parallel to the GCT cells.
EP 0110 777 A1 shows an antiparallel configuration of two single reverse blocking GCT cell zones. Separation between the single first GCT cell zone and the single second GCT cell zone is formed by two grooves penetrating from the first or second main side of the semiconductor wafer through the p doped layers forming the anode and the base layers of the two GCT cells to the drift layer. The separation between the first and second cell zone being made by a groove (i.e. by air) results in a low thermal contact between the two cell zones so that heat is hindered from spreading out of the cell zone, in which it has been produced.